View LC4101C_267673.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Ordering number : EN5280A
CMOS LSI
LC4101C
LCD Dot Matrix Segment Driver for STN Displays
Overview
The LC4101C is a segment driver for large-scale dot matrix LCD panels. It latches 240 bits of display data sent from the controller over a 4-bit or 8-bit parallel connection and generates the LCD drive signals. The LC4100C and LC4101C form a large-screen LCD panel driver chip set.
Features
* * * * * * * * Fabricated in a CMOS (P-sub) high-voltage process. LCD drive voltage: 36 V Logic system power-supply voltage: 3.0 to 5.5 V fcp max: 12 MHz (VDD = 5 V 10 %), 6.5 MHz (VDD = 3 to 4.5 V) 240 outputs Parallel input switchable between 4 and 8 bits DISPOFF function that locks the drive voltages output to the LCD at fixed levels. Display duty: 1/160 to 1/480
Specifications
Absolute Maximum Ratings at Ta = 25C 2C, standard VSS, VEEn = VEE1 or VEE2, VSSn = VSS1 or VSS2
Parameter Symbol VDD Supply voltage VEEn VSSn VIN Input voltage V0, V2 V3 V5 Operating temperature Storage temperature Topr Tstg D0 to D7, LOAD, CP, L/R, BS, TEST, DISP, DF, EIO1, EIO2 V0, V2 V3 V5 Conditions Ratings -0.3 to +7 -0.3 to +40 -0.3 to +0.3 -0.3 to VDD + 0.3 VEEn - 7 to VEEn + 0.3 -0.3 to VSSn + 7 -0.3 to +0.3 -20 to +75 -55 to +125 Unit V V V V V V V C C
Note: The voltages V0, V2, V3, and V5 must obey the relationships VEEn V0 V2 VEE - 7, and 7 V3 V5 VSSn. (Unit: V)
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
O3096HA (OT)/43096HA (OT) No. 5280-1/9
LC4101C Allowable Operating Ranges at Ta = -20 to +75C, standard VSS, VEEn = VEE1 or VEE2, VSSn = VSS1 or VSS2
Parameter Symbol VDD Supply voltage VEEn VSSn Input high-level voltage VIH VIL V0, V2 Input voltage V3 V5 CP clock frequency High-level load pulse width High-level clock pulse width VDD = 5 V 10% Low-level clock pulse width Load clock frequency LOAD/CP setup time LOAD/CP hold time DATA/CP setup time DATA/CP hold time EIO input setup time Clock rise time Clock fall time CP clock frequency High-level load pulse width High-level clock pulse width VDD = 3 to 4.5 V Low-level clock pulse width Load clock frequency LOAD/CP setup time LOAD/CP hold time DATA/CP setup time DATA/CP hold time EIO input setup time Clock rise time Clock fall time fcp tw (ldh) tw (cph) tw (cpl) fload tsu (ld) tho (ld) tsu (cp) tho (cp) tsu (ei) tr tf fcp tw (ldh) tw (cph) tw (cpl) fload tsu (ld) tho (ld) tsu (cp) tho (cp) tsu (ei) tr tf D0 to D7, CP, L/R, BS, DF, TEST, DISP, EIO1, EIO2, LOAD D0 to D7, CP, L/R, BS, DF, TEST, DISP, EIO1, EIO2, LOAD V0, V2 V3 V5 CP LOAD CP CP LOAD LOAD, CP LOAD, CP CP, D0 to D7 CP, D0 to D7 CP, EIO1, EIO2 LOAD, CP LOAD, CP CP LOAD CP CP LOAD LOAD, CP LOAD, CP CP, D0 to D7 CP, D0 to D7 CP, EIO1, EIO2 LOAD, CP LOAD, CP 35 350 50 50 45 50 50 50 40 40 200 30 200 28 20 30 50 50 6.5 50 28 28 1 0.8 VDD 0 VEEn - 7 0 0 12 Conditions min 3.0 20 0 VDD 0.2 VDD VEEn VSSn + 7 typ max 5.5 36 Unit V V V V
Input low-level voltage
V V V V MHz ns ns ns MHz ns ns ns ns ns ns ns MHz ns ns ns kHz ns ns ns ns ns ns ns
Note: 1. The voltages V0, V2, V3, and V5 must obey the relationships VEEn V0 V2 VEE - 7, and 7 V3 V5 VSSn. (Unit: V) 2. When turning on the power supplies, first turn on the logic system power supply and then turn on the high-voltage system power supply; alternatively, turn both on at the same time. When turning off the power supplies, first turn off the high-voltage system power supply and then turn off the logic system power supply; alternatively, turn both off at the same time.
No. 5280-2/9
LC4101C Electrical Characteristics at Ta = -20 to +75C, standard VSS, VDD = 3 to 5.5 V
Parameter Input high-level current Input low-level current Output high-level voltage Output low-level voltage Output on resistance Current drain Operating current drain Static current Symbol IIH IIL VOH VOL ROUT IDD IEE Istb Conditions VIN = VDD: D0 to D7, CP, L/R, BS, DF, TEST, DISP, EIO1, EIO2, LOAD VIN = VSS: D0 to D7, CP, L/R, BS, DF, TEST, DISP, EIO1, EIO2, LOAD IO = -0.4 mA: EIO1, EIO2 IO = 0.4 mA: EIO1, EIO2 VEE = 20 V, V0 - V0 = 0.5 V, V2 - V0 = 0.5 V, V0 - V3 = 0.5 V, V0 - V5 = 0.5 V, V0 = 20 V, V2 = 20 V, V3 = 0 V, V5 = 0 V: OUT1 to OUT240 VDD = 3 to 5.5 V VDD = 3 to 5.5 V, VEEn = 26 V*1 VDD = 5 V 10%, VEEn = 36 V *2 -1 0.8 VDD VSS 0.8 VDD 0.2 VDD 1.6 7.5 3.0 3.0 750 min typ max 1 Unit A A V V k A mA mA A
Note: 1. With LOAD = 28 kHz, fcp = 6.5 MHz, fDF = 75 Hz, or with no output load. Input voltages VIH and VIL must be VDD and VSS, respectively. 2. The standby current drain rating assumes that the EIOn (input) are at VDD.
Block Diagram
No. 5280-3/9
LC4101C Switching Characteristics at VDD = 5 V 10%, Ta = -20 to +75C
Parameter EIO output delay time LD/EIO output delay time LOAD-OUTn delay time DF-OUTn delay time Symbol td (eo) td (leo) td (ldo) td (dfo) 30 pF capacitive load 30 pF capacitive load 100 pF capacitive load 100 pF capacitive load Conditions min typ max 39 70 700 1.4 Unit ns ns s s
at VDD = 3 to 4.5 V, Ta = -20 to +75C
Parameter EIO output delay time LD/EIO output delay time LOAD-OUTn delay time DF-OUTn delay time Symbol td (eo) td (leo) td (ldo) td (dfo) 30 pF capacitive load 30 pF capacitive load 100 pF capacitive load 100 pF capacitive load Conditions min typ max 80 130 3 3 Unit ns ns s s
Note: 1. Since this IC detects the EIO inputs on the rising edge of the CP signal, the EIO inputs must be set up before the first data is input. As a result, a tho(ld) clock stop period is required directly after the rise of the LOAD signal if the clock frequency is relatively high.
Note: 2. If this IC is used with a 4-bit width data input, the number of data clocks between one LOAD and the next LOAD must be doubled.
No. 5280-4/9
LC4101C Pin Functions
Symbol I/O LCD drive outputs DF 1 OUT1 to OUT240 1 O 0 0 * Data 1 0 0 1 * DISP 1 1 1 1 0 OUTn V0 V2 V3 V5 V5 Function
Note: * don't care (0 or 1). V0 V2 V3 V5 VEE1/VEE2 VSS1/VSS2 DISP DF I I I I - - I I
V0 level drive voltage input V2 level drive voltage input V3 level drive voltage input V5 level drive voltage input
All pins with the same name must be set to the same potential.
High-voltage block power supply. VEE1 and VEE2 must have the same potential. High-voltage block ground. VSS1 and VSS2 must have the same potential. All outputs will be held at a fixed V5 level when this pin is low. Alternation input Enable inputs and outputs L/R EIO1 In Out EIO2 Out In
EIO1 EIO2
I/O I/O
L H
Enable inputs: Tie the first stage enable input to VSS, and then connect the enable input of each following stage to the enable output of the preceding stage. Enable outputs: When connecting multiple chips in cascade, connect the enable output to the enable input of the next stage. CP LOAD BS I I I Data acquisition clock (falling edge) Data load clock (falling edge) 4-bit/8-bit switching signal; high: 8 bits, low: 4 bits 8x30: Data latch (BS = high) L/R CP: D7 D6 D5 L D4 D3 D2 D1 L/R I D0 D7 D6 D5 H D4 D3 D2 D1 D0 1 1 2 3 4 5 6 7 8 240 239 238 237 236 235 234 233 2 9 10 11 12 13 14 15 16 232 231 230 229 228 227 226 225 3 17 18 19 20 21 22 23 24 224 223 222 221 220 219 218 217 4 25 26 27 28 29 30 31 32 216 215 214 213 212 211 210 209 29
* * * 225 * * * 226 * * * 227 * * * 228 * * * 229 * * * 230 * * * 231 * * * 232 * * * 16 * * * 15 * * * 14 * * * 13 * * * 12 * * * 11 * * * 10 ***9
30 233 234 235 236 237 238 239 240 8 7 6 5 4 3 2 1
Note: The numbers 1 to 240 in the table indicate OUT output numbers.
Continued on next page.
No. 5280-5/9
LC4101C
Continued from preceding page.
Symbol I/O 4x60: Data latch (BS = low) L/R CP: D3 L L/R I D2 D1 D0 D3 H D2 D1 D0 1 1 2 3 4 240 239 238 237 2 5 6 7 8 236 235 234 233 3 9 10 11 12 232 231 230 229 59
* * * 233 * * * 234 * * * 235 * * * 236 ***8 ***7 ***6 ***5
Function
60 237 238 239 240 4 3 2 1
Note: The numbers 1 to 240 in the table indicate OUT output numbers. Test input. This pin must be connected to VSS externally. Parallel data inputs. D0 to D3 are used when 4-bit input is used. In that case, D4 to D7 must be connected to VDD or VSS. Logic system power supply Logic system ground
TEST D0 to D7 VDD VSS
I I - -
Pad Assignment
No. 5280-6/9
LC4101C Pad Coordinates
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16 OUT17 OUT18 OUT19 OUT20 OUT21 OUT22 OUT23 OUT24 OUT25 OUT26 OUT27 OUT28 OUT29 OUT30 OUT31 OUT32 OUT33 OUT34 OUT35 OUT36 OUT37 OUT38 OUT39 OUT40 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 X coordinate -8365 -8295 -8225 -8155 -8085 -8015 -7945 -7875 -7805 -7735 -7665 -7595 -7525 -7455 -7385 -7315 -7245 -7175 -7105 -7035 -6965 -6895 -6825 -6755 -6685 -6615 -6545 -6475 -6405 -6335 -6265 -6195 -6125 -6055 -5985 -5915 -5845 -5775 -5705 -5635 -5565 -5495 -5425 -5355 -5285 -5215 -5145 -5075 -5005 -4935 Y coordinate 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 Pad No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Signal OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 OUT65 OUT66 OUT67 OUT68 OUT69 OUT70 OUT71 OUT72 OUT73 OUT74 OUT75 OUT76 OUT77 OUT78 OUT79 OUT80 OUT81 OUT82 OUT83 OUT84 OUT85 OUT86 OUT87 OUT88 OUT89 OUT90 OUT91 OUT92 OUT93 OUT94 OUT95 OUT96 OUT97 OUT98 OUT99 OUT100 X coordinate -4865 -4795 -4725 -4655 -4585 -4515 -4445 -4375 -4305 -4235 -4165 -4095 -4025 -3955 -3885 -3815 -3745 -3675 -3605 -3535 -3465 -3395 -3325 -3255 -3185 -3115 -3045 -2975 -2905 -2835 -2765 -2695 -2625 -2555 -2485 -2415 -2345 -2275 -2205 -2135 -2065 -1995 -1925 -1855 -1785 -1715 -1645 -1575 -1505 -1435 Y coordinate 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725
Continued on next page.
No. 5280-7/9
LC4101C
Continued from preceding page.
Pad No. 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 Signal OUT101 OUT102 OUT103 OUT104 OUT105 OUT106 OUT107 OUT108 OUT109 OUT110 OUT111 OUT112 OUT113 OUT114 OUT115 OUT116 OUT117 OUT118 OUT119 OUT120 OUT121 OUT122 OUT123 OUT124 OUT125 OUT126 OUT127 OUT128 OUT129 OUT130 OUT131 OUT132 OUT133 OUT134 OUT135 OUT136 OUT137 OUT138 OUT139 OUT140 OUT141 OUT142 OUT143 OUT144 OUT145 OUT146 OUT147 OUT148 OUT149 OUT150 X coordinate -1365 -1295 -1225 -1155 -1085 -1015 -945 -875 -805 -735 -665 -595 -525 -455 -385 -315 -245 -175 -105 -35 35 105 175 245 315 385 455 525 595 665 735 805 875 945 1015 1085 1155 1225 1295 1365 1435 1505 1575 1645 1715 1785 1855 1925 1995 2065 Y coordinate 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 Pad No. 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 Signal OUT151 OUT152 OUT153 OUT154 OUT155 OUT156 OUT157 OUT158 OUT159 OUT160 OUT161 OUT162 OUT163 OUT164 OUT165 OUT166 OUT167 OUT168 OUT169 OUT170 OUT171 OUT172 OUT173 OUT174 OUT175 OUT176 OUT177 OUT178 OUT179 OUT180 OUT181 OUT182 OUT183 OUT184 OUT185 OUT186 OUT187 OUT188 OUT189 OUT190 OUT191 OUT192 OUT193 OUT194 OUT195 OUT196 OUT197 OUT198 OUT199 OUT200 X coordinate 2135 2205 2275 2345 2415 2485 2555 2625 2695 2765 2835 2905 2975 3045 3115 3185 3255 3325 3395 3465 3535 3605 3675 3745 3815 3885 3955 4025 4095 4165 4235 4305 4375 4445 4515 4585 4655 4725 4795 4865 4935 5005 5075 5145 5215 5285 5355 5425 5495 5565 Y coordinate 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725
Continued on next page.
No. 5280-8/9
LC4101C
Continued from preceding page.
Pad No. 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 Signal OUT201 OUT202 OUT203 OUT204 OUT205 OUT206 OUT207 OUT208 OUT209 OUT210 OUT211 OUT212 OUT213 OUT214 OUT215 OUT216 OUT217 OUT218 OUT219 OUT220 OUT221 OUT222 OUT223 OUT224 OUT225 OUT226 OUT227 OUT228 OUT229 OUT230 OUT231 OUT232 OUT233 OUT234 OUT235 OUT236 X coordinate 5635 5705 5775 5845 5915 5985 6055 6125 6195 6265 6335 6405 6475 6545 6615 6685 6755 6825 6895 6965 7035 7105 7175 7245 7315 7385 7455 7525 7595 7665 7735 7805 7875 7945 8015 8085 Y coordinate 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 895 725 Pad No. 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 Signal OUT237 OUT238 OUT239 OUT240 VEE1 V0 V2 V3 V5 VSS1 D0 D1 D2 D3 D4 D5 D6 D7 VDD EIO2 EIO1 VSS CP LOAD DF DISP L/R BS TEST VSS2 V5 V3 V2 V0 VEE2 X coordinate 8155 8225 8295 8365 8295 7895 7495 7095 6695 6295 5055 4855 4655 4455 4255 4055 3855 3655 3335 -1295 -1895 -3095 -3495 -3695 -3895 -4095 -4495 -4695 -5095 -6295 -6695 -7095 -7495 -7895 -8295 Y coordinate 895 725 895 725 -895 -885 -885 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -885 -885 -885 -885 -885 -895
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of October, 1996. Specifications and information herein are subject to change without notice.
No. 5280-9/9

▲Up To Search▲

Price & Availability of LC4101C

	To Download LC4101C Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .